Analog Circuit Design: RF Analog-to-Digital Converters; - download pdf or read online

By Thorsten Baumheinrich, Bernd Prégardier, Ulrich Langmann (auth.), Rudy J. van de Plassche, Hohan H. Huijsing, Willy Sansen (eds.)

ISBN-10: 1441951857

ISBN-13: 9781441951854

ISBN-10: 1475726023

ISBN-13: 9781475726022

`The authors are to be complimented for accumulating, right into a unmarried reference, loads of fascinating details regarding the above pointed out themes, rather priceless for data-acquisition procedure designers, RF engineers, and others.'
Microelectronics magazine 29 (1998) 1039-1046

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Additional info for Analog Circuit Design: RF Analog-to-Digital Converters; Sensor and Actuator Interfaces; Low-Noise Oscillators, PLLs and Synthesizers

Sample text

5 [~m] Figure 10: Maximum relative bandwidth F 3dB,max as a function of technology feature size. 1 ox DD V L ' 1( (24) RANGE in which VDD is the supply voltage. In Figure 11 the relative power dissipation P r is shown as a function of the technology feature size. lm technology gate length L has a minimum value, bandwidth is 40 maximum for this technology. 2 V. ~ / s.. 8 ~ ~ 8. ~ 04 . ' Relative power dissipation of amplifier as a function of technology feature size with a constant bandwidth 5.

In the AID converter four folding signals are generated in this way, resulting in a number of 12 folding triplets in the first folding stage. The MOS implementation of these circuits is shown in Figure 15. SRl ,I SR13 SR3 r '. { \ { IFS1 IFS2 FSl l SR15 SR5 I \ \ I \ ! I \ I - SR1? Stage 1 IFS3 \ I FSl Y,n Stage 2 Figure 14: Combination of block r t and 2 nd stage folding triplets to a folding 43 (~ .......... ~... ;;;~ ... J 2~ ~ '''','> ............................ )i: ................ ". , 0 FS1 ~1- Figure 15: Circuit implementation of folding triplet with cross-coupled NMOS differential pairs.

Although the 5x improvement in offset is significant, it is still not sufficient for our goal here and an averaging technique is proposed to further reduce the effects of offsets. 3. AVERAGING Fig. 2. shows a technique of averaging the output voltages of individual amplifier stages by inserting lateral resistors between the outputs of neighboring stages. For each individual amplifier the output voltage Fig. 3. Kattmann and Barrow's implementation of averaging. 52 is no longer determined by its own decision alone, but through the averaging resistors, is also influenced by its neighbors.

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Analog Circuit Design: RF Analog-to-Digital Converters; Sensor and Actuator Interfaces; Low-Noise Oscillators, PLLs and Synthesizers by Thorsten Baumheinrich, Bernd Prégardier, Ulrich Langmann (auth.), Rudy J. van de Plassche, Hohan H. Huijsing, Willy Sansen (eds.)


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